http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003173213-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_73ebc284a55d5daf0e209d6186c9e65c |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03F1-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0948 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G05F3-24 |
filingDate | 2001-12-06^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b8f52fa3ab13f2ae60963e026a9f8586 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_23a74c6a829902d0461ddcffc004fbab |
publicationDate | 2003-06-20^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2003173213-A |
titleOfInvention | Bias voltage generation circuit, semiconductor device, CMOS reference voltage generation circuit, and power supply monitoring circuit |
abstract | (57) [Problem] To provide a bias voltage generation circuit capable of generating a bias voltage or the like with little dependence on power supply fluctuation, a semiconductor device including the same, and the like. SOLUTION: This is a bias voltage generation circuit for generating VBS at an output node N10, an output resistance element R40 having one end connected to VDD and the other end connected to N10, and a drain electrode and a gate electrode connected to N10. An output transistor NT40 having a source electrode connected to VSS; The current control circuit 40 includes a current control circuit 40 provided in parallel with T40. The current control circuit 40 performs current control for increasing the current flowing from N10 to VSS via the current control circuit 40 as VDD increases. A characteristic curve having a flat or negative slope such that the amount of increase in the bias voltage VBS when VDD increases becomes zero or negative in the saturation region. PL of a semiconductor device whose circuit is constituted by a gate array The charge / discharge current of the charge pump circuit included in the L circuit is generated based on the bias voltage from the bias voltage generation circuit. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011008514-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8283969-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013200665-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2005045365-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8314649-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4715080-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006134126-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009535829-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009536491-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7511568-B2 |
priorityDate | 2001-12-06^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID56842161 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID451508066 |
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