http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004071901-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0005
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-00
filingDate 2002-08-07^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90fce25fbb034f02c466839f53d66e23
publicationDate 2004-03-04^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2004071901-A
titleOfInvention Semiconductor integrated circuit
abstract The present invention controls the output impedance of a package constituent member to a predetermined output impedance with respect to manufacturing variations, and adjusts the output impedance of each output buffer with equal accuracy. A detection circuit detects an output impedance of a monitor output buffer including an impedance of a pattern wiring having an average wiring length of pattern wirings on a package substrate. The control signal generation circuit 4 controls the output impedances of the output buffers 1a and 1b and the monitor output buffer 2 to predetermined impedances based on the output impedance detected by the detection circuit 3. [Selection diagram] Fig. 1
priorityDate 2002-08-07^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID516892
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID453034310

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