http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009164340-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ad8be5613da19d081abd4348946c0408 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1e4c3dae1cca0a042a75474abd2d2a47 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-02 |
| filingDate | 2008-01-07^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e0d5b6d5c06d4102eaba1e2e3122652c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49c87a12825a81b4acece89116e6120d |
| publicationDate | 2009-07-23^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2009164340-A |
| titleOfInvention | 3D circuit board and manufacturing method thereof |
| abstract | Provided is a method of manufacturing a three-dimensional circuit board, which can bond a base material and a conductor metal with high peel strength, has a high degree of freedom in circuit design, and can manufacture a three-dimensional circuit board easily and efficiently. . A base material forming step (S1) for obtaining a base material (12) by forming a thermoplastic heat-resistant film having electrical insulating properties into a three-dimensional shape, and an electrical insulating portion (I) of a conductive circuit (C) provided on the surface of the base material (12). Circuit mask mounting step S2 for mounting a mask 20 formed in a three-dimensional shape so as to cover the surface of the corresponding portion at the corresponding portion, and conducting to the conductive circuit C forming portion which is an uncovered portion of the mask 20 of the substrate 12. After the paste 14a is applied, the mask 20 is removed, and the conductive paste 14a is cured by curing the conductive paste 14a, and a conductive metal is electroplated on the surface of the conductive coat layer 14 to perform conductive plating. It is characterized by comprising an electroplating treatment step S4 for obtaining the layer 16. [Selection] Figure 3 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101541730-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017510987-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013187246-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013125820-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9894758-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2013132930-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-104145536-A |
| priorityDate | 2008-01-07^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Showing number of triples: 1 to 80 of 80.