| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c186e9ae8cafab5df5c8d80cfa7b0fa1 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0623 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-049
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66068
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0475
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-306
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-045
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0623
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-12 |
| filingDate |
2011-04-01^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_02d0ec9f94216fc8b72126451aefef62
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_652889f5c813b257db718f72782cbfae
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b5083511aeef16853618b44808fd70f4 |
| publicationDate |
2012-11-08^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2012216701-A |
| titleOfInvention |
Silicon carbide semiconductor device |
| abstract |
A semiconductor device capable of increasing a degree of freedom in setting a threshold voltage while suppressing a decrease in channel mobility. A silicon carbide layer is epitaxially formed on a main surface of a substrate. The silicon carbide layer is provided with a groove having side walls 6 inclined with respect to the main surface. Side wall 6 has an off angle of 50 ° or more and 65 ° or less with respect to the {0001} plane. Gate insulating film 8 is provided on sidewall 6 of the silicon carbide layer. The silicon carbide layer is opposed to the gate electrode 9 through the gate insulating film 8 and has a first conductivity type, and a pair of regions 2 separated from each other by the body region 3 and having the second conductivity type, 4 is included. Body region 3 has an impurity density of 5 × 10 16 cm −3 or more. [Selection] Figure 1 |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11398558-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2013031172-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2015060027-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015082632-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014175518-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015026726-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016012677-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9728633-B2 |
| priorityDate |
2011-04-01^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |