http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017527113-A

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filingDate 2014-08-11^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2017-09-14^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2017527113-A
titleOfInvention Sealed package with stress reduction layer
abstract The sealed package includes a device disposed on the wafer structure and a lid structure bonded to the device wafer. The device wafer includes a substrate; a metal ring disposed on a surface portion of the substrate around the device; and a bonding material disposed on the metal ring. The first layer of the metal ring includes a stress relaxation buffer layer, has a higher ductility than the surface portion of the substrate, and is wider than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relaxation buffer layer has a thermal expansion coefficient that is larger than the thermal expansion coefficient of the surface portion of the substrate and smaller than the thermal expansion coefficient of the bonding material.
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