| abstract |
To improve the reliability of a semiconductor device. An impurity concentration of a p ++ -type source region PS and a p ++ -type drain region PD is 5 × 10 20 cm -3 or more. End of the channel region PCH side of the insulating film IL1a is disposed on the p + -type source region LPS, has an inclined surface which in accordance with the direction from the p + -type source region LPS in the channel region PCH is the thickness of the insulating film IL1a thinner . End of the channel region PCH side of the insulating film IL1b is disposed on p + -type drain region LPD, having an inclined surface according to the direction from the p + -type drain region LPD in the channel region PCH is the thickness of the insulating film IL1b thinner . The gate electrode GEa is formed on the channel region PCH, on the p + -type source region LPS, on the p + -type drain region LPD, on the inclined surface of the insulating film IL1a, and the insulating film IL1b via the gate insulating film GI1a including the aluminum oxide film. Are placed on the slope of the. [Selected figure] Figure 1 |