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filingDate 2018-02-15^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2019-08-29^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2019145537-A
titleOfInvention Manufacturing method of semiconductor integrated circuit
abstract In a semiconductor integrated circuit including a plurality of multi-layer junction structures having opposite conductivity types, the punch-through withstand voltage of the multi-layer junction structure having a trade-off relationship can be improved, and a withstand voltage characteristic margin against process variation is improved. Provided is a method for manufacturing a semiconductor integrated circuit that is easily secured. A step of forming a first well region of a second conductivity type on an upper portion of a support layer of a first conductivity type; and an oxide film is formed on the first well region by a thermal oxidation method; A step of selectively reducing the impurity concentration of the second conductivity type on the upper surface side of the first well region 21; a step of removing the oxide film 32; and a second well of the first conductivity type above the first well region 21. Forming a region, and integrating a semiconductor element having a main electrode region of the second conductivity type on the second well region. [Selection] Figure 7A
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