http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H11354667-A

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filingDate 1998-06-05^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1643ce10e4bfcc4b29c983cf94aad5d
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publicationDate 1999-12-24^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H11354667-A
titleOfInvention Electronic component and its mounting method
abstract [PROBLEMS] To mount a semiconductor integrated circuit, it is possible to mount the semiconductor integrated circuit at an extremely high density, to take a high-performance cooling structure, and to manufacture the semiconductor integrated circuit by a different device process technology. It is an object of the present invention to provide an electronic component capable of mounting a chip, a passive component, or an optical component in a small area, and a mounting method thereof. SOLUTION: A semiconductor chip is mounted on a silicon wafer substrate, an insulating film is formed on the silicon wafer substrate, and a through hole is provided in the insulating film corresponding only to an electrode pad portion of the semiconductor chip. A wiring pattern is formed by depositing a conductive film on the substrate and forming a pattern on the conductive film.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2015043495-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2001217337-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-03023745-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006054310-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008521228-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011249830-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20030075814-A
priorityDate 1998-06-05^^<http://www.w3.org/2001/XMLSchema#date>
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