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filingDate 2004-07-30^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2006-08-29^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2006-08-29^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-100616391-B1
titleOfInvention Semiconductor memory
abstract The semiconductor memory device includes a plurality of data select lines arranged in parallel to each other, a plurality of data transfer lines arranged in parallel to intersect the data select lines, and an electrically rewritable memory laid out at an intersection between the data select lines and the data transfer lines. A memory cell array having cells; A data select line driver for driving a data select line of the memory cell array; A sense amplifier circuit connected to a data transmission line of the memory cell array for performing data reading of the memory cells selected by one of the data select lines; And a control circuit used for timing control of data read of the memory cell array to output at least two types of timing signals different according to the selected data region of the memory cell array.
priorityDate 2003-07-31^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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