http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100780059-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2874 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-0021 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-005 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2872 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2863 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2884 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-275 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-183 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-42 |
| filingDate | 2002-08-12^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2007-11-29^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2007-11-29^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100780059-B1 |
| titleOfInvention | How to Perform Wafer Level Burn-in in Electronics |
| abstract | The present invention relates to a method for wafer level burn-in (WLBI) of semiconductor devices 210,215. The method provides a system having at least two electrodes 210, 215. Electrical biases and / or heat sources are applied to each side of the wafer having top and bottom electrical contacts for the semiconductor devices formed on the wafer 100. Also described is a flexible conductive layer 910 for providing fins on the device side of a wafer with electrical contacts and / or protecting the wafer from mechanical pressure applied to its surface. A method of using a cooling system 950 is disclosed that can maintain a constant wafer temperature during burn-in. Wafer level burn-in can be performed by applying an electrical and physical connection to the substrate surface of the wafer using a lower contact plate (915). Then, using an upper contact plate, an electrical and physical connection is applied to an individual contact associated with a semiconductor device provided on the semiconductor wafer (910), and through the upper and lower contact plates from a power source connected to the first and second contact plates. In operation 920, power is provided to the semiconductor device. Next, power is monitored and controlled at the semiconductor device during the time described according to a specific burn-in condition (935), and power is removed at the end of the time (955). Finally, electrical and physical connections are removed from the semiconductor wafer (965).n n n n Burn-in, wafer level, graphite, semiconductor device |
| priorityDate | 2001-08-13^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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