| abstract |
A semiconductor package and a method of manufacturing the same are disclosed. A first substrate on which a predetermined pattern is formed; A first chip mounted on one surface of the first substrate by a flip chip method; A first molding part covering the first substrate and the first chip; A first via penetrating the first molding part and electrically connected to a pattern formed on the first substrate; An interposer mounted on the first molding part and having predetermined patterns formed on both surfaces thereof; A second via penetrating the interposer and electrically connecting both sides of the interposer; A second substrate seated on the interposer to be electrically connected to the pattern formed on the interposer via the conductive ball; And a second chip mounted on a second substrate, the chip may be mounted on a lower package in a flip chip manner, and the heat dissipation performance may be improved by interposing an interposer between the upper package and the lower package. High integration can be achieved. |