| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0289
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0809
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0291
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-061
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3674
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S81-01
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0646
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0666 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/A01K97-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-2092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-32 |
| filingDate |
2014-01-10^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2015-03-09^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2015-03-09^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-101499183-B1 |
| titleOfInvention |
Semiconductor device and display device |
| abstract |
The present invention aims at suppressing fluctuation of the threshold voltage of the transistor, reducing the number of contact points of the driver IC provided on the display panel, achieving low power consumption of the display device, and achieving a larger or higher image quality of the display device. The gate electrode of the transistor susceptible to deterioration is connected to the wiring through which the high potential is supplied through the first switching transistor and the wiring through which the low potential is supplied through the second switching transistor and the clock signal is supplied to the gate electrode of the first switching transistor And the inverted clock signal is input to the gate electrode of the second switching transistor to alternately supply the high potential or the low potential to the gate electrode of the easily deteriorated transistor. |
| priorityDate |
2006-09-29^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |