| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-023
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1051 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-02 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-02 |
| filingDate |
2013-12-30^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-04-09^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2020-04-09^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-102099406-B1 |
| titleOfInvention |
Semiconductor apparatus |
| abstract |
A clock buffer that buffers an external clock in response to an activation control signal and outputs it as an internal clock, a delay fixed loop unit that compares the phases of the internal clock and the feedback clock to generate a delay fixed clock, and the internal clock in response to a read signal And an operation control unit generating the activation control signal according to the phase comparison result of the feedback clock. |
| priorityDate |
2013-12-30^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |