http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20090087449-A

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filingDate 2007-03-20^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_96fd63112a8e2be50e116fd6c5b59bf7
publicationDate 2009-08-17^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber KR-20090087449-A
titleOfInvention Stacked Package Element, Terminal Formation Method of Stacked Package Element, Stacked Package, and Formation Method of Stacked Package Element
abstract Provided is a semiconductor chip module having a high degree of freedom in assigning a circuit to each semiconductor chip and in the position of a connection terminal for each semiconductor chip.n n n BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip module in which a plurality of semiconductor chips, in which a portion of a connection terminal to be connected to a circuit pattern provided on a surface, is provided on a side surface, are bonded to each other. Terminal portions for connection on the side surfaces of each semiconductor chip are interconnected by a wiring pattern. The terminal for a connection in a semiconductor chip extends from the surface to the side surface, and is formed by spraying an electrically conductive material in the mist state.
priorityDate 2007-03-20^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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