| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a492183be65153abfa7dec00d51c816 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F1-12 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 |
| filingDate |
2009-06-09^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1551ca074d19f15f675efd2aac8f4a58
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_52f2a4a4e82c720d59ad458713f9af37
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_41aaaa5f92b516a8247431c8be0e9b0c |
| publicationDate |
2010-12-17^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20100132139-A |
| titleOfInvention |
Clock receiver of semiconductor integrated circuit and its control method |
| abstract |
The clock receiver of the disclosed semiconductor integrated circuit may include a first clock buffer that performs a buffering operation on an external clock in response to a first operation signal, and generates a low frequency buffering clock, and a buffering operation on the external clock in response to a second operation signal. A second clock buffer configured to generate a high frequency buffering clock and an input of the low frequency buffering clock and the high frequency buffering clock to control states of the first operation signal and the second operation signal and generate an internal clock; It includes a clock generator. |
| priorityDate |
2009-06-09^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |