| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c63bc5ef3ae590b0603de4587961cac3 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42356
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66712 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2011-07-07^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_de4ad711b9bd604cf9ef3a4368c4f02c |
| publicationDate |
2013-01-16^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20130005775-A |
| titleOfInvention |
Buried gate in semiconductor device and method for fabricating the same |
| abstract |
PURPOSE: A buried gate in a semiconductor device and a method for fabricating the same are provided to reduce the tensile stress of a capping layer by forming a buffer layer on a buried gate electrode. CONSTITUTION: A recess pattern(17) is formed on a substrate. A recess pattern includes an element isolation film(16). A buried gate electrode is buried in a part of the recess pattern. A buffer layer(19) has a compressive stress. A capping layer is formed on the buffer layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9853031-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10199379-B2 |
| priorityDate |
2011-07-07^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |