| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-7205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-1036
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-1032
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-0409
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2206-1014 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0655
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0619
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-3495
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0246
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0679 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06 |
| filingDate |
2014-05-20^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_293a342ebd172e01b1b28e0e2cd4cac9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_64da0ba87d5134ba2d444efd35244585
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cde7052d6a35ebd8216d9b3d9ecb27ff |
| publicationDate |
2015-12-01^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20150133913-A |
| titleOfInvention |
Operating method of memory controller |
| abstract |
The present invention relates to a method of operating a memory controller for controlling a non-volatile memory device including a plurality of user blocks and a plurality of spare blocks. The method of operation of the memory controller comprises the steps of: detecting a number of spare blocks used among a plurality of spare blocks for a predetermined interval and a ratio of the operation counts for a predetermined interval; And transmitting an end-of-life warning signal to an external device based on the detected rate. The memory controller may replace the bad block with one of the plurality of spare blocks when at least one block of the plurality of user blocks becomes a bad block, and the used spare block may be a reserved block replaced with at least one of the plurality of user blocks Block, the operation count is either an erase count indicating the number of erasures of the non-volatile memory device, a program count indicating the number of program times of the non-volatile memory device, and a time count indicating the use time. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11275678-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11481272-B2 |
| priorityDate |
2014-05-20^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |