http://rdf.ncbi.nlm.nih.gov/pubchem/patent/SE-538062-C2

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filingDate 2012-09-27^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d4793acb0ef924a807aa21769c95449d
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publicationDate 2016-02-23^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber SE-538062-C2
titleOfInvention Chemically plated metal wire through silicon
abstract ABSTRACT The invention re1ates to a method of making a substrate-through metal via having ahigh aspect ratio, in a semiconductor substrate, and a metal pattern on thesubstrate surface. It comprises providing a semiconductor substrate (Wafer) anddepositing po1y-si1icon on the substrate. The the poly-silicon on the substratesurface is patterned by etching away unWanted portions. Then, Ni is se1ective1eydeposited on the po1y-si1icon by an e1ectro1ess process. A via hole is made throughthe substrate, Wherein the Walls in the ho1e is subjected to the same processing as above. Cu is deposited Cu on the Ni by an e1ectro1ess process. (Pig. 14)
priorityDate 2012-09-27^^<http://www.w3.org/2001/XMLSchema#date>
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