http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-200836488-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-1976
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-089
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0891
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-08
filingDate 2007-11-30^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_589045702681cf93464f419817a655c6
publicationDate 2008-09-01^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-200836488-A
titleOfInvention Linear phase frequency detector and charge pump for phase-locked loop
abstract Techniques for achieving linear operation for a phase frequency detector and a charge pump in a phase-locked loop (PLL) are described. The phase frequency detector receives a reference signal and a clock signal, generates first and second signals based on the reference and clock signals, and resets the first and second signals based on only the first signal. The first and second signals may be up and down signals, respectively, or may be down and up signals, respectively. The phase frequency detector may delay the first signal by a predetermined amount, generate a reset signal based on the delayed first signal and the second signal, and reset the first and second signals with the reset signal. The charge pump receives the first and second signals and generates an output signal indicative of phase error between the reference and clock signals.
priorityDate 2006-11-30^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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