| abstract |
A thin film transistor array substrate, wherein the second conductive layer is a multi-layer structure, the second conductive layer is formed as a spaced-apart source and a drain, and the second conductive layer comprises at least: a first sub-layer located on the channel layer And electrically connected to the channel layer; a second sub-layer on the first sub-layer; a third sub-layer on the second sub-layer; the first sub-layer and the third sub-layer comprising indium and An oxide material of zinc; a ratio of indium zinc atoms in the first sublayer is greater than a ratio of indium zinc atoms in the third sublayer; a recess is formed in the second conductive layer, A difference in the ratio of the number of indium zinc atoms of the first sub-layer and the third sub-layer affects the formation of the contour of the groove during etching, resulting in the width of the groove in the third sub-layer being greater than the groove in the The width of the first sublayer. |