http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-288205-B

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_88fc7f9eb617072238851d46591a0c76
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B20-38
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-112
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8246
filingDate 1996-04-13^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 1996-10-11^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3bc15193962757841ae215aae0dd4876
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0bd252b1126026bcf62d06d2b6463f34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ce48d2997451cf470de19a425a2faad8
publicationDate 1996-10-11^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-288205-B
titleOfInvention Process of fabricating high-density flat cell mask read only memory
abstract A process of fabricating high-density flat cell mask read only memory comprises the steps of: (1) forming multiple trenches on predetermined source/drain region in one silicon substrate; (2) forming one insulator on the multiple trench surfaces; (3) removing the insulator surface to form one first polysilicon; (4) removing partial first polysilicon to make remaining first polysilicon leave in those trenches; (5) removing the insulator by hydrofluoric acid; (6) forming one second polysilicon on the silicon substrate, the first polysilicon and the insulator; (7) etching the second polysilicon to form the source/drain region; (8) forming one gate oxide and one third polysilicon independently on the silicon substrate and the source/drain region surface; (9) patterning the gate oxide and the third polysilicon to form one gate.
priorityDate 1996-04-13^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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