| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2641d0599003ace698669341dee61c8a |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-0409
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2029-5006 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-103
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-021
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-062
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1057
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-106
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C29-028 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-04 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-06 |
| filingDate |
2019-03-12^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-07-28^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b27c7f1f4654b129de6ffa2493b3e162
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a0bdb3206b2348af9a15fdcaa9b00dbd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_900d961c2bfff7a65b6565f4482e7c2f |
| publicationDate |
2020-07-28^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10726888-B2 |
| titleOfInvention |
Read latency reduction in a memory device |
| abstract |
A memory device can include: a memory array with memory cells arranged as data lines; an interface that receives a read command requesting bytes of data in a consecutively addressed order from an address of a starting byte; a first buffer that stores a first data line from the memory array that includes the starting byte; a second buffer that stores a second data line from the memory array, which is consecutively addressed with respect to the first data line; output circuitry configured to access data from the buffers, and to sequentially output each byte from the starting byte through a highest addressed byte of the first data line, and each byte from a lowest addressed byte of the second data line until the requested data bytes has been output; and a data strobe driver that clocks each byte of data output by a data strobe on the interface. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11681352-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11704258-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11366774-B2 |
| priorityDate |
2016-03-04^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |