Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d37147a1eebc1b4c794a203b6f0da7e5 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4908 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133514 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133567 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133606 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2201-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2202-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-136222 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F2203-01 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133502 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02B1-11 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-133606 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1218 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1362 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02F1-1368 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1362 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1335 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368 |
filingDate |
2019-05-28^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-02-15^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a17a2d15d8537954bacdd8d2e147407c |
publicationDate |
2022-02-15^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11251202-B2 |
titleOfInvention |
Thin film transistor (TFT) array substrate and display panel |
abstract |
A thin film transistor (TFT) array substrate and a display panel are provided. The TFT array substrate has a base substrate, an anti-reflection layer, and a gate electrode insulating layer. The TFT array substrate has a light-transmitting region. The anti-reflection layer is disposed on the base substrate of the light-transmitting region. The gate electrode insulating layer is disposed on the anti-reflection layer. Light refractive indexes of the base substrate, the anti-reflection layer, and the gate electrode insulating layer are increasing sequentially. |
priorityDate |
2019-05-15^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |