Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3c754156d9ab873a2efe5a3990dbf627 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0243 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0286 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2320-0223 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2300-0426 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0291 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0264 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3655 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3266 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 |
filingDate |
2021-08-04^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-09-13^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0fa6984d54d366852cb8ecf5dcfbc80f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cdd46f2098086a811526c98748ca3315 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ded014188a6e32d1497c5156d9644bd1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_02bf610e19a3ab25d805c5ab8dabbb66 |
publicationDate |
2022-09-13^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11443709-B2 |
titleOfInvention |
Display panel with reduced border area improving charging and discharging capacities of gate driving circuit |
abstract |
A display panel is provided. The display panel includes a plurality of scan lines and a gate driving circuit. The scan lines are disposed on the display panel along a first direction, and respectively provide a plurality of gate driving signals. The gate driving circuit is disposed on a first side of the display panel along a second direction. The second direction intersects the first direction. The gate driving circuit includes a plurality of bias generators and a plurality of signal output circuits. The signal output circuits are divided into a plurality of groups. The bias generators respectively correspond to the groups. The bias generators generate a plurality of first bias voltages. The groups generate the gate driving signals respectively according to the first bias voltages. |
priorityDate |
2021-01-06^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |