Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36f8253f3d0d59bcd9259217d4385d10 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48472 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-072 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3735 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48227 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-4817 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-049 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-072 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-057 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-48 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-057 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L25-07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-48 |
filingDate |
2020-05-05^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-10-04^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_13fb7e64127fe28c4f3a68e4d62e8030 |
publicationDate |
2022-10-04^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11462446-B2 |
titleOfInvention |
Power semiconductor module arrangement and method for producing the same |
abstract |
A power semiconductor module arrangement includes a semiconductor substrate arranged in a housing, at least one semiconductor body being arranged on the semiconductor substrate, and a mounting arrangement including a frame or body, a first terminal element, and a second terminal element. The mounting arrangement is inserted in and coupled to the housing. Each terminal element mechanically and electrically contacts the semiconductor substrate with a first end. A middle part of each terminal element extends through the frame or body. A second end of each terminal element extends outside the housing. The first terminal element is dielectrically insulated from the second terminal element by a portion of the frame or body. The first terminal element is injected into and inextricably coupled to the frame or body. The second terminal element is arranged within a hollow space inside the frame or body and is detachably coupled to the frame or body. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022359365-A1 |
priorityDate |
2019-05-06^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |