Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0685 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-061 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1036 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4087 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-0659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4096 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4096 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-408 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4091 |
filingDate |
2021-03-29^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2022-10-25^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a0a96769366f7da2c4877b05ab0c57ea http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_14daea52438283ed4333c07c4cfb1296 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e9410f1a317563181997b5f12fee58ff http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_56ff4e89badf2c7257c77056f631e1d2 |
publicationDate |
2022-10-25^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-11482260-B2 |
titleOfInvention |
Apparatuses and methods for scatter and gather |
abstract |
The present disclosure includes apparatuses and methods related to scatter/gather in a memory device. An example apparatus comprises a memory device that includes an array of memory cells, sensing circuitry, and a memory controller coupled to one another. The sensing circuitry includes a sense amplifier and a compute component configured to implement logical operations. A channel controller is configured to receive a block of instructions, the block of instructions including individual instructions for at least one of a gather operation and a scatter operation. The channel controller is configured to send individual instructions to the memory device and to control the memory controller such that the at least one of the gather operation and the scatter operation is executed on the memory device based on a corresponding one of the individual instructions. |
priorityDate |
2015-02-06^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |