| abstract |
A semiconductor device structure and method for manufacture includes a substrate having a top first layer of dielectric material; a second layer of material selected from the group including: amorphous Silicon (a-Si), amorphous Ge (a-Ge) or alloys thereof, located on top of the first layer; and, a third layer located on top of the a-Si, a-Ge, or alloys thereof layer, wherein the second layer provides adhesion between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective a-Si, a-Ge, or alloys thereof bonding layers disposed to enhance adhesion between the different layers. Further, an electronic device structure incorporates layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the adhesion between different dielectric is enhanced by an intermediate a-Si, a-Ge, or alloys thereof bonding layer. The thin a-Si, a-Ge, or alloys thereof layer may be hydrogenated or non-hydrogenated, or even partially oxidized. |