| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c447d6238d9999fd1f681cb4efb458e8 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42332
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40114
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B99-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7887 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
| filingDate |
2006-08-16^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f189a033cc7dc1900376adca6d5bc22d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4b5819658fac8497dc6c47a699b09bd0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3db47fe7fbb9f247e19558ac69def251
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5d7ddcf470dcf59ca4ae8dbf47886426
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_23eacd6207e228467e1cefb0cca6b61e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_32f8007c01f643c593698f7be4c95885 |
| publicationDate |
2006-12-07^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2006273377-A1 |
| titleOfInvention |
Nonvolatile memory device and method of manufacturing the same |
| abstract |
Provided are a nonvolatile memory device and a method of manufacturing the same. The device includes a semiconductor substrate; a source region and a drain region disposed in the semiconductor substrate and a channel region interposed between the source and drain regions; a first tunnel oxide layer disposed on the channel region near the source region; a second tunnel oxide layer disposed on the channel region near the drain region; a first charge trapping layer disposed on the first tunnel oxide layer; a second charge trapping layer disposed on the second tunnel oxide layer; a blocking oxide layer covering the first and second charge trapping layers; a charge isolation layer interposed between the first and second charge trapping layers; and a gate electrode disposed on the blocking oxide layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9799668-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8395202-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9240495-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2014209284-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2529956-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2529956-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8017481-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008035983-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7663177-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7667260-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008150046-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7691709-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2007029602-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010112778-A1 |
| priorityDate |
2003-10-29^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |