http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008198678-A1

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publicationDate 2008-08-21^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2008198678-A1
titleOfInvention Programmable sram source bias scheme for use with switchable sram power supply sets of voltages
abstract A memory circuit has a high voltage and low voltage supply nodes. One of a first and second sets of voltages is selectively applied to the supply nodes of the memory circuit in dependence upon memory operational mode. If in active read/write mode, then the first set of voltages is selectively applied. Conversely, if in standby no-read/no-write mode, then the second set of voltages is selectively applied. A low voltage in the second set of voltages is greater than a low voltage in the first set of voltages by a selected one of a plurality of low offset voltages, and a high voltage in the second set of voltages is less than a high voltage in the first set of voltages by a selected one of a plurality of high offset voltages. The offset voltages are provided by diode-based circuits that are selectively active. Selective activation is provided by either selectably blowable fuse elements or selectively activated switching elements.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7688669-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9633716-B2
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016225438-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10217509-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10984855-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008198679-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7623405-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2008211513-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010309736-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8654574-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2010165709-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8482964-B2
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