| abstract |
A starting non-planar semiconductor structure is provided having a semiconductor substrate, raised semiconductor structures coupled to the substrate, and a layer of isolation material(s) surrounding the raised structures. The isolation layer is recessed to expose about 40 nm to about 70 nm of the raised structures. The increased height of the exposed raised structures, compared to conventional, allows for a taller gate and taller spacers, which reduces undercut under the spacers and short-channel effects from the loss of isolation material in fabrication. |