http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017133221-A1

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filingDate 2017-01-24^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_011a1eb4497ba4bdfe2941f41c4f19f1
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publicationDate 2017-05-11^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2017133221-A1
titleOfInvention Buffer stack for group iiia-n devices
abstract A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided Group IIIA-N layer is deposited on the substrate, and a first essentially void-free Group IIIA-N layer is then deposited on the first voided Group IIIA-N layer. A first high roughness Group IIIA-N layer is deposited on the first essentially void-free Group IIIA-N layer, and a first essentially smooth Group IIIA-N layer is deposited on the first high roughness Group IIIA-N layer. At least one Group IIIA-N surface layer is then deposited on the first essentially smooth Group IIIA-N layer.
priorityDate 2014-12-15^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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