http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018240575-A1

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02H9-041
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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01C7-12
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01C7-102
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filingDate 2015-08-13^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_998404f7e64e6a9602de70b1defa6f82
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e72adc6cc9be1cd55d0fac1aac3e290
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publicationDate 2018-08-23^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2018240575-A1
titleOfInvention Overvoltage Protection Device
abstract An overvoltage protection device ( 100 ) may include a metal oxide varistor (MOV) ( 102 ) having a first surface ( 114 ) and a second surface ( 116 ); a semiconductor substrate ( 202 ) having a first outer surface ( 126 ) and a second outer surface ( 128 ) and comprising a semiconductor crowbar device ( 104 ) comprising a plurality of semiconductor layers arranged in electrical series to one another, the semiconductor substrate ( 202 ) being disposed on a first side of the metal oxide varistor ( 102 ), a conductive region ( 124 ) disposed between the second surface ( 116 ) of the MOV ( 102 ) and the first outer surface ( 126 ) of the semiconductor substrate ( 202 ); a first electrical contact ( 120 ) disposed on the first surface ( 114 ) of the MOV ( 102 ); and a second electrical contact ( 122 ) disposed on the second outer surface ( 128 ) of the semiconductor substrate ( 202 ).
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2020106964-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11641103-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11362513-B2
priorityDate 2015-08-13^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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