| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01J2001-4466
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01J2001-444 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G04F10-005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01J1-44
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01S17-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01S7-4863
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01S7-4865
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01B11-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0995
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0812 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-081
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G04F10-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01B11-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01J1-44 |
| filingDate |
2019-06-27^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_eb49cc4c18fec2d1dfd8e58845a140a8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1be3c7f2ec6e5fe592ea9aaa71ef25b8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d0ee30da5651d5b672ff5917c13aefde
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9e94841bf76bd0a3cc7f694fcbf6bd67
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bab251bef770e82b393aed7ea6e1a964 |
| publicationDate |
2020-01-16^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2020018642-A1 |
| titleOfInvention |
Time-To-Digital Converter Circuit and Method for Single-Photon Avalanche Diode Based Depth Sensing |
| abstract |
A self-calibration time-to-digital converter (TDC) integrated circuit for single-photon avalanche diode (SPAD) based depth sensing is disclosed. The circuit includes a SPAD matrix with a plurality of SPAD pixels arranged in m rows and n columns, the SPAD pixels in each column of SPAD pixels are connected by a column bus; a global DLL unit with n buffers and n clock signals; and an image signal processing unit for receiving image signals from the column TDC array. The circuit can also include a row control unit configured to enable one SPAD pixel in each row for a transmitting signal; a circular n-way multiplexer for circularly multiplexing n clock signals in the global DLL unit; a column TDC array with n TDCs, each TDC further comprises a counter and a latch, the latch of each TDC is connected to the circular n-way multiplexer for circular multiplexing. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11199444-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11644547-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11747451-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2020408885-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022011159-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022137192-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11726187-B2 |
| priorityDate |
2018-07-11^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |