http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2020058666-A1

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publicationDate 2020-02-20^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2020058666-A1
titleOfInvention Memory device and manufacturing method thereof
abstract A memory device and manufacturing method thereof are provided. The memory device includes a pair of stacked structures, a charge storage layer, and a channel layer. The stacked structures are disposed on a substrate. Each stacked structure includes gate layers and insulating layers stacked alternately, and a cap layer on the gate layers and the insulating layers. The charge storage layer is disposed on sidewalls of the stacked structures facing each other. The channel layer covers the charge storage layer, and has a top portion, a body portion, and a bottom portion. The top portion covers sidewalls of the cap layers of the stacked structures. The bottom portion covers a portion of the substrate located between the stacked structures. The body portion is connected between the top and bottom portions. Dopant concentrations of the top and bottom portions are respectively greater than a dopant concentration of the body portion.
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