| abstract |
In fabricating a large-scale semiconductor integrated circuit, a wiring layer within each unit cell is formed of a conductive material which is hard and highly resistant to corrosion, and test pads for each unit cell are formed of a conductive material which is soft and low resistant to corrosion. After testing each unit cell by using the test pads, the test pads are etched away. If necessary, pad relocation wiring which is used to substitute a good unit cell for a bad unit cell may be formed of the hard and highly corrosion-resistant conductive material, and an intercell wiring layer may be formed of the soft and low corrosion-resistant conductive material. |