| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6d9154e26fc0b2ff7da4670fd4991f5c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_179e03fcaf517d93d145cb469d157eaf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9b678cc1261d1fcbf79f3c30c3ad480f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_872cf55fbd80ededb7a560059998f653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b8c3a05b0ccb1d63968a46e3bdb81927 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-1078
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10T428-31678 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76805
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76888
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53223
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7685 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B32B15-00 |
| filingDate |
2008-08-20^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2012-07-31^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_146927f579157df600b5b97d471d25f5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79dcdcdf66989b4d35fb46e702db5257
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9e943b53bd56047aa088160760594721
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fefba986bf65e716751d99deffa78909
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3c88ad0e9dfd1f0cf539e7150a9ef33 |
| publicationDate |
2012-07-31^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-8232638-B2 |
| titleOfInvention |
Interconnection structure having oxygen trap pattern in semiconductor device |
| abstract |
An interconnection structure having an oxygen trap pattern in a semiconductor device, and a method of fabricating the same are provided. The interconnection structure includes a lower interlayer insulating layer formed on a semiconductor substrate. A metal layer pattern and a capping layer pattern are sequentially stacked on the lower interlayer insulating layer. An oxygen trap pattern is disposed on the capping layer pattern and includes a conductive oxygen trap pattern. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2023014509-A1 |
| priorityDate |
2007-08-24^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |