http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8254194-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_dce32d948943b6553cc2363d16b4f321 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_14ba71eccbb5f65a22b78f39b3c6ffc3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e18bf8de6cf8943bafd516af1f1dce92 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5f15058b9756df7dc2b9c355176ede91 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-063 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-067 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-02 |
| filingDate | 2010-10-25^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2012-08-28^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1d246ff99d5ebbe3d2824d688729daa http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a0c2dbd4d249079e0cc1be5cc6c7eb02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dfa836e87fd8d71b358994a1d7d074b0 |
| publicationDate | 2012-08-28^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-8254194-B2 |
| titleOfInvention | Sense amplifier with reduced area occupation for semiconductor memories |
| abstract | A reading circuit for a semiconductor memory, comprising: a circuital branch adapted to be electrically coupled to a bit line which is connected to a memory cell to be read; an evaluation circuit adapted to sense a cell electric current flowing through the bit line during a sensing phase of a reading operation of the data stored into the memory cell, the evaluation circuit comprising a negative feedback control loop adapted to control the potential of the bit line during the sensing phase, the control loop comprising a differential amplifier having an inverting input terminal operatively connected to the bit line, a non-inverting input terminal fed by a first reference potential, and a feedback circuital path connected between an output of the differential amplifier and the inverting input, wherein the feedback circuital path is adapted to conduct a measure current corresponding to the cell electric current, and comprises current/voltage conversion means for converting the measure current into a corresponding voltage. The conversion means of the feedback circuital path comprises at least one first transistor arranged to conduct the measure current, and biasing means adapted to bias the at least one first transistor so as to emulate the behavior of a resistor. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10762953-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8994406-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013342253-A1 |
| priorityDate | 2006-02-28^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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