http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8330868-B2

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b8a3ecf23c10d4e4c0c0510cff9abf5d
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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04N5-208
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04N5-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04N5-21
filingDate 2010-03-03^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2012-12-11^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aa7f45256ec56caec2b3f73609dca60b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2aed3e6f2133c36db0420867b344ad7e
publicationDate 2012-12-11^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-8330868-B2
titleOfInvention Image processing apparatus
abstract An image quality adjusting circuit in an image processing apparatus is provided with a line memory unit, a delay circuit unit, a first to fourth filter processing circuits, and an adder. In the delay circuit unit, delay circuits are arranged in a matrix form. Delay circuits arranged in a horizontal direction receive an image data directly or via line memories. The image quality adjusting circuit each perform filter processing on the received image data signals lying in a horizontal direction, in a vertical direction, in a down-right direction, and in a down-left direction. The image quality adjusting circuit performs addition of the image data on a focus pixel and the filter-processed data, and thus performs edge correction processing.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8830402-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9001274-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014333838-A1
priorityDate 2009-05-29^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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