http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9449137-B2

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filingDate 2013-09-17^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2016-09-20^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0d243d906807e844b5239235d0390947
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publicationDate 2016-09-20^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-9449137-B2
titleOfInvention Buffered conduits for high throughput channel implementation, crosstalk de-sensitization and late timing fixes on skew sensitive buses
abstract A method of manufacturing a system on a chip and a system on a chip including a set of pre-designed modules. These modules are place on a semiconductor and connecting by a set of busses formed according to a set of design rules specifying tracks having a minimum size of conductors and a minimum spacing between conductors. The busses are routed in a preferred direction. The busses include minimum size conductors at alternate tracks within a selected metal layer of the semiconductor and minimum size conductors at alternate tracks in a different metal layer. The conductors in the different metal layer are connected to corresponding connectors in the selected metal layer by vias. Shields of conductors not connected to the bus may be included in tracks not including bus conductors.
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