| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-68381
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2221-68372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-2003 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0273
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3081
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31133
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-6836
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-6835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0475 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-683
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2016-10-31^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2017-10-31^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_df148a4b79537001fbc97eb61a0bd9e7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8ab096395e0417e21eb18e6a6ebf45ea
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d2ebae8b70fe8232376dfb84dd71b974 |
| publicationDate |
2017-10-31^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9805978-B2 |
| titleOfInvention |
Method of manufacturing semiconductor device |
| abstract |
A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate. |
| priorityDate |
2015-12-03^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |