http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2004032198-A2

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filingDate 2003-10-03^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_baa96aa7946070067a41f304c3fc5439
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publicationDate 2004-04-15^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2004032198-A2
titleOfInvention Method for maintaining solder thickness in flipchip attach packaging processes
abstract A packaging assembly for semiconductor devices and a method for making such packaging is described. The invention provides a non-Pb bump design during a new flip-chip method of packaging. The design uses special conductive materials in a stud form, rather than a solder ball containing Pb. This configuration maintains a desirable solder thickness between the die and the leadframe and forms a high standoff by restricting solder wettabilty on the leadframe side. This configuration also absorbs any stress and protects the die from cracking. The invention also provides methods for making such semiconductor packages.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102004021054-A1
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priorityDate 2002-10-03^^<http://www.w3.org/2001/XMLSchema#date>
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