http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2017137682-A1

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
filingDate 2017-02-03^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a61e53769f8d13ed96746431120e6547
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1357a5e862dd9d3893aaa29a94094399
publicationDate 2017-08-17^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2017137682-A1
titleOfInvention Process for producing connections to an electronic chip
abstract The invention relates to a process for producing conductive connections (30) to an electronic chip, comprising the following steps: a) depositing an insulating layer (7, 9) on one face of a wafer; b) producing a layer based on at least one metal covering the insulating layer and equipped with first apertures; c) etching second apertures in the insulating layer (7, 9) in the extension of the first apertures by plasma etching in a plasma based on at least one halogen-containing compound; d) vacuum annealing the entire structure obtained after step c); and e) forming, after step d), the conductive connections in the second apertures.
priorityDate 2016-02-09^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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