http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2018067464-A1

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filingDate 2017-10-02^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2018-04-12^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2018067464-A1
titleOfInvention Methods and devices using pvd ruthenium
abstract Ruthenium containing gate stacks and methods of forming ruthenium containing gate stacks are described. The ruthenium containing gate stack comprises a polysilicon layer on a substrate; a silicide layer on the polysilicon layer; a barrier layer on the silicide layer; a ruthenium layer on the barrier layer; and a spacer layer comprising a nitride on sides of the ruthenium layer, wherein the ruthenium layer comprises substantially no ruthenium nitride after formation of the spacer layer. Forming the ruthenium layer comprises sputtering the ruthenium in a krypton environment on a high current electrostatic chuck comprising a high resistivity ceramic material. The sputtered ruthenium layer is annealed at a temperature greater than or equal to about 500 °C.
priorityDate 2016-10-03^^<http://www.w3.org/2001/XMLSchema#date>
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