http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2021041547-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-401 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-403 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 |
| filingDate | 2020-08-26^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6278db5139bef1b706556941f2a4f43d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_616cfc1bb6d8745309a3bc42c7e50a83 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_858b1f3c39360d935f4f1ab719238323 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8d5fef4462a765c61e7506ca1025fff1 |
| publicationDate | 2021-03-04^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-2021041547-A1 |
| titleOfInvention | Memory device having 2-transistor vertical memory cell and a common plate |
| abstract | Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a substrate, a conductive plate located over the substrate to couple a ground connection, a data line located between the substrate and the conductive plate, a memory cell, and a conductive line. The memory cell includes a first transistor and a second transistor. The first transistor includes a first region electrically coupled between the data line and the conductive plate, and a charge storage structure electrically separated from the first region. The second transistor includes a second region electrically coupled to the charge storage structure and the data line. The conductive line is electrically separated from the first and second regions and spans across part of the first region of the first transistor and part of the second region of the second transistor and forming a gate of the first and second transistors. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11665880-B2 |
| priorityDate | 2019-08-28^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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