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ORCIDAntonio J. Ginés
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2020 – today
- 2023
[j8]Carlos Manuel Domínguez-Matas
, Antonio J. Ginés, Aránzazu Otín, Valentin Gutierrez, Gildas Léger, Eduardo J. Peralías:
Behavioral Model for High-Speed SAR ADCs With On-Chip References. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 1918-1930 (2023)- [c35]Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Valentin Gutierrez, C. Dominguez, Maria Angeles Jalón, L. Carranza:
A Single-Event Latchup setup for high-precision AMS circuits. ETS 2023: 1-6 - 2022
- [c34]Gildas Léger, Antonio J. Ginés, Valentin Gutierrez, Manuel J. Barragán:
A methodology for defect detection in analog circuits based on causal feature selection. ICECS 2022 2022: 1-4 - 2021
- [j7]Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías:
Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3197-3210 (2021) - 2020
- [c33]Renato S. Feitoza, Manuel J. Barragán, Antonio J. Ginés, Salvador Mir:
On-chip reduced-code static linearity test of Vcm-based switching SAR ADCs using an incremental analog-to-digital converter. ETS 2020: 1-2 - [c32]Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías:
Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy. ISCAS 2020: 1-5 - [c31]J. A. Serrano, Antonio J. Ginés, Eduardo J. Peralías:
Fast Simulation of Non-Linear Circuits using Semi-Analytical Solutions Based on the Matrix Exponential. ISCAS 2020: 1-5 - [c30]Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías:
Digital calibration of capacitor mismatch and comparison offset in Split-CDAC SAR ADCs with redundancy. NEWCAS 2020: 130-133 - [c29]Antonio J. Ginés, Gildas Léger, Eduardo J. Peralías:
Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation of the Redundant INL. NEWCAS 2020: 142-145 - [c28]Renato S. Feitoza, Manuel J. Barragán, Antonio J. Ginés, Salvador Mir:
Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique. NEWCAS 2020: 295-298
2010 – 2019
- 2019
- [j6]Antonio Jose Ginés, Eduardo José Peralías, Cristina Aledo, Adoración Rueda:
Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder. Int. J. Circuit Theory Appl. 47(3): 333-349 (2019) - [c27]Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Mismatch and Offset Calibration in Redundant SAR ADC. DCIS 2019: 1-5 - 2018
- [c26]Antonio Lopez-Angulo, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Redundant SAR ADCs with Split-capacitor DAC. ICECS 2018: 801-804 - [c25]Valentin Guiterrez, Antonio J. Ginés, Gildas Léger:
AMS-RF test quality: Assessing defect severity. IOLTS 2018: 23-28 - [c24]Antonio J. Ginés, Antonio Lopez-Angulo, Eduardo J. Peralías, Adoración Rueda:
Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. ISCAS 2018: 1-5 - 2017
- [j5]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1718-1729 (2017) - [j4]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2966-2970 (2017) - [c23]Manuel J. Barragán, Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
On the limits of machine learning-based test: A calibrated mixed-signal system case study. DATE 2017: 79-84 - 2016
- [c22]Manuel Delgado-Restituto, Manuel Carrasco-Robles, Rafaella Fiorelli, Antonio Jose Ginés Arteaga, Ángel Rodríguez-Vázquez:
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications. APCCAS 2016: 421-424 - [c21]Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda, Guillaume Renaud, Manuel J. Barragán, Salvador Mir:
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. ETS 2016: 1-6 - 2015
- [j3]Antonio Jose Ginés, Eduardo J. Peralías, Adoración Rueda:
Background Digital Calibration of Comparator Offsets in Pipeline ADCs. IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1345-1349 (2015) - [c20]Juan Núñez, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. LASCAS 2015: 1-4 - 2014
- [c19]Antonio J. Ginés, Gildas Léger:
Sigma-delta testability for pipeline A/D converters. DATE 2014: 1-6 - [c18]Eduardo J. Peralías, Antonio Jose Ginés, Adoración Rueda:
INL systematic reduced-test technique for Pipeline ADCs. ETS 2014: 1-6 - [c17]Antonio J. Ginés, Eduardo J. Peralías, Gildas Léger, Adoración Rueda:
Closed-loop simulation method for evaluation of static offset in discrete-time comparators. ICECS 2014: 538-541 - 2013
- [c16]Ricardo Doldán, Antonio J. Ginés, Adoración Rueda:
Inductor characterization in RF LC-VCOs. LASCAS 2013: 1-4 - 2012
- [c15]Antonio Jose Ginés, Alberto Villegas, Eduardo J. Peralías, Adoración Rueda:
Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. ICECS 2012: 256-259 - [c14]Ricardo Doldán, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Analysis of steady-state common-mode response in differential LC-VCOs. ISCAS 2012: 2031-2034 - 2011
- [j2]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus. IEEE Trans. Instrum. Meas. 60(2): 452-461 (2011) - 2010
- [j1]Gildas Léger, Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
On Chopper Effects in Discrete-Time SigmaDelta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2438-2449 (2010) - [c13]Antonio J. Ginés, Ricardo Doldán, Adoración Rueda, Eduardo J. Peralías:
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. ICECS 2010: 45-48 - [c12]Antonio J. Ginés, Ricardo Doldán, Manuel J. Barragan Asian, Adoración Rueda, Eduardo J. Peralías:
On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation. ISCAS 2010: 1979-1982
2000 – 2009
- 2009
- [c11]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. ECCTD 2009: 97-100 - [c10]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
A survey on digital background calibration of ADCs. ECCTD 2009: 101-104 - 2008
- [c9]Ricardo Doldán Lorenzo, Antonio Jose Ginés Arteaga, Adoración Rueda, Eduardo J. Peralías:
A 5GHz wide tuning range LC-VCO in sub-micrometer CMOS technology. APCCAS 2008: 558-561 - [c8]Antonio Jose Ginés, Ricardo Doldán, Alberto Villegas, Antonio J. Acosta, Maria Angeles Jalón, Diego Vázquez, Adoración Rueda, Eduardo J. Peralías:
A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. APCCAS 2008: 1252-1255 - 2007
- [c7]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Improved Background Algorithms for Pipeline ADC Full Calibration. ISCAS 2007: 3383-3386 - [c6]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. SBCCI 2007: 21-26 - 2006
- [c5]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. ISCAS 2006 - 2005
- [c4]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Full calibration digital techniques for pipeline ADCs. ISCAS (3) 2005: 1976-1979 - 2004
- [c3]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Digital Background Gain Error Correction in Pipeline ADCs. DATE 2004: 82-87 - 2003
- [c2]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda:
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. SBCCI 2003: 317-322 - 2002
- [c1]Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid:
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. DATE 2002: 310-314
Coauthor Index
aka: Eduardo José Peralías
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