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Stefanos Valadimas
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2010 – 2019
- 2016
- [b1]Stefanos Valadimas:
Τεχνικές ανίχνευσης και διόρθωσης λαθών χρονισμού για αυξημένη αξιοπιστία ολοκληρωμένων κυκλωμάτων σε νανομετρικές τεχνολογίες. National and Kapodistrian University of Athens, Greece, 2016 - [j3]Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni:
Timing Error Tolerance in Small Core Designs for SoC Applications. IEEE Trans. Computers 65(2): 654-663 (2016) - [c5]Stefanos Valadimas, Angela Arapoyanni, Yiorgos Tsiatouhas:
Timing error mitigation in microprocessor cores. ICECS 2016: 772-775 - 2014
- [j2]Stefanos Valadimas, Andreas Floros, Yiorgos Tsiatouhas, Angela Arapoyanni, Xrysovalantis Kavousianos:
The Time Dilation Technique for Timing Error Tolerance. IEEE Trans. Computers 63(5): 1277-1286 (2014) - [c4]Stefanos Valadimas, Angela Arapoyanni:
Timing Error Tolerance in Pipeline Based Core Designs. Panhellenic Conference on Informatics 2014: 31:1-31:6 - 2013
- [j1]Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni, Petros Xarchakos:
Effective Timing Error Tolerance in Flip-Flop Based Core Designs. J. Electron. Test. 29(6): 795-804 (2013) - 2012
- [c3]Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni, Adrian Evans:
Single event upset tolerance in flip-flop based microprocessor cores. DFT 2012: 79-84 - [c2]Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni:
Cost and power efficient timing error tolerance in flip-flop based microprocessor cores. ETS 2012: 1-6 - 2010
- [c1]Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni:
Timing error tolerance in nanometer ICs. IOLTS 2010: 283-288
Coauthor Index
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