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ORCIDAsha Balijepalli
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2010 – 2019
- 2010
[j3]Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Chi-Chao Wang, Frank Liu, Sani R. Nassif, Yu Cao
:
Modeling and Analysis of the Nonrectangular Gate Effect for Postlithography Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. 18(4): 666-670 (2010)
2000 – 2009
- 2009
- [j2]Yu Cao, Asha Balijepalli, Saurabh Sinha, Chi-Chao Wang, Wenping Wang, Wei Zhao:
The Predictive Technology Model in the Late Silicon Era and Beyond. Found. Trends Electron. Des. Autom. 3(4): 305-401 (2009) - [j1]Asha Balijepalli, Joseph Ervin, William Lepkowski, Yu Cao, Trevor J. Thornton:
Compact modeling of a PD SOI MESFET for wide temperature designs. Microelectron. J. 40(9): 1264-1273 (2009) - 2008
- [c4]Saurabh Sinha, Asha Balijepalli, Yu Cao:
A Simplified Model of Carbon Nanotube Transistor with Applications to Analog and Digital Design. ISQED 2008: 502-507 - 2007
- [c3]Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Frank Liu, Sani R. Nassif, Yu Cao:
Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. DAC 2007: 823-828 - [c2]Asha Balijepalli, Saurabh Sinha, Yu Cao:
Compact modeling of carbon nanotube transistor for early stage process-design exploration. ISLPED 2007: 2-7 - [c1]Asha Balijepalli, Joseph Ervin, Yu Cao, Trevor Thornton:
Compact Modeling of a PD SOI MESFET for Wide Temperature Designs. ISQED 2007: 133-138
Coauthor Index
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