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2020 – today
- 2023
[c27]Abigail Mortensen, Scott Pomerville, David B. Whalley, Soner Önder, Gang-Ryung Uh:
Facilitating the Bootstrapping of a New ISA. LCTES 2023: 2-12- 2021
- [j2]Michael Stokes, David B. Whalley, Soner Önder:
Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache. ACM Trans. Archit. Code Optim. 18(3): 28:1-28:22 (2021)
2010 – 2019
- 2019
- [c26]Michael Stokes, Ryan Baird, Zhaoxiang Jin, David B. Whalley, Soner Önder:
Improving Energy Efficiency by Memoizing Data Access Information. ISLPED 2019: 1-6 - 2018
- [c25]Zhaoxiang Jin, Soner Önder:
A two-phase recovery mechanism. ICS 2018: 107-117 - [c24]Zhaoxiang Jin, Soner Önder:
Dynamic Memory Dependence Predication. ISCA 2018: 235-246 - [c23]Michael Stokes, Ryan Baird, Zhaoxiang Jin, David B. Whalley, Soner Önder:
Decoupling address generation from loads and stores to improve data access energy efficiency. LCTES 2018: 65-75 - 2015
- [c22]Zhaoxiang Jin, Görkem Asilioglu, Soner Önder:
Mower: A New Design for Non-blocking Misprediction Recovery. ICS 2015: 285-294 - [c21]Görkem Asilioglu, Zhaoxiang Jin, Murat Köksal, Omkar Javeri, Soner Önder:
LaZy superscalar. ISCA 2015: 260-271 - 2014
- [c20]Shuhan Ding, John Earnest, Soner Önder:
Single Assignment Compiler, Single Assignment Architecture: Future Gated Single Assignment Form*; Static Single Assignment with Congruence Classes. CGO 2014: 196 - [c19]Hui Meen Nyew, Nilufer Onder, Soner Önder, Zhenlin Wang:
Verifying micro-architecture simulators using event traces. ICS 2014: 323-332 - 2013
- [c18]Hui Meen Nyew, Nilufer Onder, Soner Önder, Zhenlin Wang:
A First-Order Logic Based Framework for Verifying Simulations. AAAI 2013: 1635-1636 - 2010
- [c17]Shuhan Ding, Soner Önder:
Unrestricted Code Motion: A Program Representation and Transformation Algorithms Based on Future Values. CC 2010: 26-45
2000 – 2009
- 2008
- [c16]Peng Zhou, Soner Önder:
Improving single-thread performance with fine-grain state maintenance. Conf. Computing Frontiers 2008: 251-260 - 2006
- [c15]Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang:
Path-Based Reuse Distance Analysis. CC 2006: 32-46 - [c14]Changpeng Fang, Steve Carr
, Soner Önder, Zhenlin Wang:
Feedback-directed memory disambiguation through store distance analysis. ICS 2006: 278-287 - 2005
- [c13]Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang:
Instruction Based Memory Distance Analysis and its Application. IEEE PACT 2005: 27-37 - [c12]Steve Carr, Soner Önder:
A case for a working-set-based memory hierarchy. Conf. Computing Frontiers 2005: 252-261 - [c11]Peng Zhou, Soner Önder, Steve Carr:
Fast branch misprediction recovery in out-of-order superscalar processors. ICS 2005: 41-50 - 2004
- [c10]Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang:
Reuse-distance-based miss-rate prediction on a per instruction basis. Memory System Performance 2004: 60-68 - [c9]Jeff Bastian, Soner Önder:
Specification of Intel IA-32 Using an Architecture Description Language. IFIP-WADL 2004: 151-166 - 2002
- [j1]Soner Önder, Rajiv Gupta:
Dynamic Memory Disambiguation in the Presence of Out-of-order Store Issuing. J. Instr. Level Parallelism 4 (2002) - [c8]Soner Önder:
Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets. IEEE PACT 2002: 232-241 - [c7]Siddharth Rele, Santosh Pande, Soner Önder, Rajiv Gupta:
Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. CC 2002: 261-275 - 2001
- [c6]Soner Önder, Rajiv Gupta:
Instruction Wake-Up in Wide Issue Superscalars. Euro-Par 2001: 418-427 - [c5]Soner Önder, Rajiv Gupta:
Load and store reuse using register file contents. ICS 2001: 289-302
1990 – 1999
- 1999
- [c4]Soner Önder, Jun Xu, Rajiv Gupta:
Caching and Predicting Branch Sequences for Improved Fetch Effectiveness. IEEE PACT 1999: 294-302 - [c3]Soner Önder, Rajiv Gupta:
Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing. MICRO 1999: 170-176 - 1998
- [c2]Soner Önder, Rajiv Gupta:
Superscalar Execution with Direct Data Forwarding. IEEE PACT 1998: 130-135 - [c1]Soner Önder, Rajiv Gupta:
Automatic Generation of Microarchitecture Simulators. ICCL 1998: 80-89
Coauthor Index
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