"Performance verification of high-performance ASICs using at-speed ..."

Vikram Iyengar et al. (2006)

> Home

Details and statistics

DOI: 10.1145/1127908.1127966

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/IyengarJABDFGSTW06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/IyengarJABDFGSTW06
Vikram Iyengar, Mark Johnson, Theo Anemikos, Bob Bassett, Mike Degregorio, Rudy Farmer, Gary Grise, Phil Stevens, Mark Taylor, Frank Woytowich:
Performance verification of high-performance ASICs using at-speed structural test. ACM Great Lakes Symposium on VLSI 2006: 247-252

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.