"An efficient VLSI architecture for edge filtering in H.264/AVC."

Chung-Ming Chen, Chung-Ho Chen (2005)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2007-01-25

- no documents available
- export record
  dblp key:
  - conf/iastedCCS/ChenC05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iastedCCS/ChenC05
Chung-Ming Chen, Chung-Ho Chen:
An efficient VLSI architecture for edge filtering in H.264/AVC. Circuits, Signals, and Systems 2005: 118-122

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.